32 GATE Question of the Day – Computer Science

.	Addressing structure
	A. defines the fundamental method of determining effective operand addresses B. are variations in the use of fundamental addressing structures, or some associated actions which are related to addressing. C. performs indicated operations on two fast registers of the machine and leave the result in one of the registers. D. all of the above E. None of the above

31 GATE Question of the Day – Computer Science

5.	Process is
	A. program in High level language kept on disk B. contents of main memory C. a program in execution D. a job in secondary memory E. None of the above

30 GATE Question of the Day – Computer Science

A system program that combines the separately compiled modules of a program into a form suitable for execution

A. assembler B. linking loader C. cross compiler D. load and go E. None of the above

29 GATE Question of the Day – Computer Science

	To avoid the race condition, the number of processes that may be simultaneously inside their critical section is
	A. 8 B. 1 C. 16 D. 0 E. None of the above

28 GATE Question of the Day – Computer Science Gate

2.	Which of the following refers to the associative memory?
	A. the address of the data is generated by the CPU B. the address of the data is supplied by the users C. there is no need for an address i.e. the data is used as an address D. the data are accessed sequentially E. None of the above

27 GATE Question of the Day – Computer Science Gate 2013

1.
The part of machine level instruction, which tells the central processor what has to be done, is

A. Operation code
B. Address
C. Locator
D. Flip-Flop
E. None of the above

26 GATE Question of the Day – Computer Science

1. What is the complement of the language accepted by the NFA shown below? Assume Σ = {a} and is the
empty string

A) ∅
(B) {ε}
(C) a
(D) {a, ε}
2. The protocol data unit (PDU) for the application layer in the Internet stack is
(A) Segment
(B) Datagram
(C) Message
(D) Frame
3. A process executes the code
Fork ();
Fork ();
Fork ();
The total number of child processes created is
(A) 3
(B) 4
(C) 7
(D) 8
4. The decimal value 0.5 in IEEE single precision floating point representation has
(A) Fraction bits of 000…000 and exponent value of 0
(B) Fraction bits of 000…000 and exponents value of -1
(C) Fraction bits of 000…000 and exponents value of -1
(D) No exact representation
5. The worst case running time to search for an element in a balanced in a binary search tree with v2”
elements is
(A) Θ(n log n)
(B) Θ (n2n)
(C) Θ (n)
(D) Θ (log n)
All the Best!!!

24 GATE Question of the Day – Electrical Engineering

1. The bridge method commonly used for finding mutual inductance is
(A) Heaviside Campbell bridge
(B) Schering bridge
(C) De Sauty bridge
(D) Wien bridge

25 GATE Question Of The Day – Electromagnetics

The modes in a rectangular waveguide are denoted by TE_mn/TM_mn where m and n are the eigen numbers along the larger and smaller dimensions of the waveguide respectively. Which one of the following statements is TRUE?

(A) The TM₁₀ mode of the wave does not exist

(B) The TE₁₀ mode of the wave does not exist

(C) The TM₁₀ and the TE₁₀ modes both exist and have the same cut-off

      frequencies

(D) The TM₁₀ and TM₁₀ modes both exist and have the same cut-off frequencies

23 GATE Question Of The Day – Digital Electronics

Two identical NMOS transistors M1 and M2 are connected as shown below. V_bias is chosen so that both transistors are in saturation. The equivalent g_m of the pair is defined to be at constant V_out.

            The equivalent g_m‘s of the pair is

 (A)        The sum of individual g_m‘s of the transistors

 (B)        The product of individual g_m‘s of the transistors

 (C)        Nearly equal to the g_m of M1                                                                   

 (D)        Nearly equal to g_m /g₀ of M2

22 GATE Question Of The Day – Digital Electronics

For each of the positive edge-triggered J-K flip flop used in the following figure, the propagation delay is DT

 

Which of the following waveforms correctly represents the output at Q₁?

 

21 GATE Question Of The Day – Digital Electronics

The logic function implemented by the following circuit at the terminal OUT is

(A)        P NOR Q           

(B)        P NAND Q         

(C)        P OR Q              

(D)        P AND Q

Today the week Day Started guys!!! open your ideas and give your comments!

20 GATE Question Of The Day – Digital Electronics

For the circuit shown in the figure, D has a transition from 0 to 1 after CLK changes from 1 to 0. Assume gate delays to be negligible

 Which of the following statements is true?

            (A)        Q goes to 1 at the CLK transition and stays at 1

            (B)        Q goes to 0 at the CLK transition and stays at 0

            (C)        Q goes to 1 at the CLK transition and goes to 0 when D goes to 1

            (D)        Q goes to 0 at the CLK transition and goes to 1 when D goes to 1

Pick up the correct options guys just a simple thing for my well wished friend(s)!

19 GATE Question Of The Day – Digital Electronics

The two numbers represented in signed 2′s complement form are P = 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2′s complement form is?

(A)        100000111        (B)        00000111          (C)        11111001          (D)        111111001

18 GATE Question Of The Day – Electromagnetics

Consider a closed surface S surrounding volume V. If is the position vector of a

point inside S, with the unit normal on S, the value of the integral dS is

(A) 3V

(B) 5V

(C) 10V

(D) 15V